The present invention relates generally to semiconductor devices, and more particularly to metal-oxide-semiconductor (“MOS”) devices.
In the manufacture of semiconductor devices conductive polycide is often employed to impart enhanced conductivity to conductive layers. Polycide is a combination of polysilicon and refractory metal silicide layers that offers lower resistivity than polysilicon alone. Polycides may be formed using silicides of a variety of refractory metals including, but not limited to, metals such as titanium, tungsten, tantalum, molybdenum, etc. In one common example, the silicidation of polysilicon (e.g., to form polycide) has been previously implemented to reduce the electrical resistance of gate electrode and interconnect metallization in metal-oxide-semiconductor field effect transistor (“MOSFET”) devices.
Polycides may be formed in a number of different ways including, for example, by depositing a refractory metal onto a polysilicon layer, followed by annealing at a sufficiently high temperature to form a metal silicide. Alternatively, metal silicide may be deposited, for example, by using sputtering, low pressure chemical vapor deposition (“LPCVD”), evaporation, etc. In one example of the latter method, U.S. Pat. No. 5,946,599 describes LPCVD deposition of tungsten silicide onto doped-polysilicon.
Although various methods and improvements thereto have been developed for the fabrication of conductive polycide, problems in the fabrication of polycides still exist. For example, one major problem commonly experienced with existing polycide fabrication technologies is lack of adhesion between the metal silicide layer and the polysilicon layer. This lack of adhesion, or adhesion loss, may result in separation or peeling of a refractory metal silicide layer from an underlying polysilicon layer, translating to lowered product yield.
Attempts have been made to address adhesion problems encountered with polycide layers, such as those encountered during fabrication of MOSFET devices. For example, U.S. Pat. No. 5,089,432 describes encapsulation of a polycide layer with a tetraethoxysilane (“TEOS”) deposited silicon dioxide dielectric layer which is preserved above the polycide layer via masking during spacer etch to improve adhesion. In another example, U.S. Pat. No. 5,946,566 proposes improving adhesion between metal silicide and polysilicon layers by deposition of a polysilicon layer having a wavy or undulated surface, i.e., hemi-spherical grain (“HSG”) polysilicon or acid-treated polysilicon. Drawbacks associated with such methods include increased cost and process complexity. Further, encapsulation of polycide requires very tight control of spacer densification conditions, e.g., to maintain a very controlled oxidation environment in a furnace tube, in order to maintain the integrity of the encapsulation.